2021 International Power Supply-on-Chip (PwrSoC) Workshop
Posted: 2020-3-3

University of Pennsylvania, Philadelphia, PA
October 24 - 27, 2021
Sponsored by PSMA and IEEE PELS


The seventh edition of the biennial International Workshop on Power Supply on Chip (PwrSoC) originally scheduled for October 25 thru October 28 2020 has been re-scheduled to October 24 thru October 27, 2021 due to concerns of the impact of COVID19 on the expected ability of attendees to travel to and attend a live event. The workshop is still scheduled to be held at the Singh Center for Nanotechnology on the campus of the University of Pennsylvania in Philadelphia PA The value of workshop has always been recognized as an event that brings together global academic and industry experts to formally and informally discuss issues to advance and productize power supply on chip technologies.

Plans are being developed for a condensed virtual event to take place in the November 2020 timeframe to keep the discussions and forums active and current for power supply on chip applications and technologies that have taken place since the previous workshop in 2018 and are on track to provide some updates before the next live workshop in 2021.

The technical program committee is working to put together a program of uncompromised caliber and value to include at least one presentation from each of the eight technical lecture presentation sessions. Several presentations will be assigned to each of several webinar sessions which will be less than two hours each during the month of November 2020. There will be a panel question and answer session for the technical presentations of each individual webinar event. Each webinar session will not close until all the questions submitted for that webinar event are answered. In response to the general chair Mark Allen's guidance to  " … address options that will help the virtual program try to approach some of the interaction that have made the live workshops so successful in the past …", the technical program is also identifying other features to maintain a level of interaction across a global community which is an integral part to the success of the workshop series.

The workshop is the leading international forum for the discussion of the challenges and opportunities in technology, business and supply chain, with intent on advancing the miniaturization and integration of power conversion and power management solutions. The workshop features presentation and dialog sessions of advanced technologies with global academic and industry experts aimed at miniaturizing power management solutions through system architecture, circuits and topology, packaging, and passive components. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint sponsors for the  workshop.

Throughout its history, the workshop has spotlighted advanced technologies to build granular power supplies and compelling demonstrations of commercialized products that make a clear case for PwrSoC and PSiP technologies becoming more prominent and mainstream.

The technical program chairs for the workshop are Prof Hanh-Phuc Le of University of California at San Diego and Matt Wilkowski of EnaChip. Hanh-Phuc and Matt have both been presenters, session chairs and program chairs for past Power Supply on Chip workshops. A team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology has been assembled to chair the workshop's nine sessions.

  • Plenary Session - Jose Cobos, University Polytechnic Madrid
  • Systems and Applications - Francesco Carobolante, IoTissimo
  • Topologies and Control - Bruno Allard, Université de Lyon
  • Wideband Gap Integration - Brian Ma, University Texas Dallas
  • Integrated Capacitors & Energy Storage - Medhi Jatlaoui,, Murata
  • Integrated Magnetics - Masahiro Yamaguchi, Tohoku University Japan
  • Sys Integ Manufacturing and Packaging - Baoxing Chen, Analog Devices
  • Granular Power - Santosh Kulkarni, Dialog Semiconductor
  • Posters - Minjie Chen, Princeton University

The planning of the technical program, supporting activities as well as identifying workshop partners to contribute to its success are in process. If interested to be a workshop partner, please contact the workshop financial chair, Trifon Liakopoulos, at the following e-mail address:

Continuing the tradition of the enthusiasm, market relevance and success of past workshops, we are looking forward to the virtual corridor event in October 2021 bridging discussions and developments since the most recent workshop in Taiwan during October 2018, while progressing along the path to PwrSoC 2021 in Philadelphia, PA.

General Chair:
    Dr Mark Allen

Technical Program Co-Chairs
  Matt Wilkowski
  Prof. Hanh-Phuc Le

2019 IEEE PELS/PSMA Workshop on Packaging and Integration in Power Delivery (PwrPack)
Posted: 2019-12-6
An Exploratory Discussion Leading to PwrSoC


The first PwrPACK Workshop was held on October 31 and November 1 at Arizona State University at the SkySong Synergy I Innovation was sponsored by Power Sources Manufacturers Association (PSMA), in partnership with IEEE Power Electronics Society (PELS)。 PwrPACK2019 was aimed at expanding the PwrSoC brand to companies and peripheral efforts typically not associated with the traditional PwrSoC focus。


Hongbin Yu, General Chair stated, "The workshop was a success with attendance exceeding our planned goal. The presenters were from the local Phoenix area with a few coming from international distances. Most importantly, the satellite PwrPACK Workshop achieved the intent to increase the awareness of the PwrSoC developments and create a lead-in to the 3-day PwrSoC Workshop that will be held at the University of Pennsylvania in 2020"

The two-half day workshop focused on two topics related to power delivery in a package:

  1. Process and integration of multi-die power delivery in package
  2. Power system in package (PSIP) power modules

福建快3计划with invited speakers from both industry and academia who addressed the challenges and opportunities in miniaturization and efficient power delivery that benefits an increasing number of application areas."

PwrPACK Attendees 2019

Jim Doyle, Technical Program Co-Chair, commented, "SkySong provided a very modern high-tech location with Workshop, restaurants, and hotel all within comfortable close proximity. With slightly over 50 attending, ASU was an outstanding host providing high-quality venue and service while keeping us within budget. Many attendees requested that future events be held at SkySong.

Hongbin Yu, General Chair
Jim Doyle Technical Program Chair

Everyone was welcomed to the Arizona State University by Bertan Bakkalpglu, ON Semiconductor Professor from School of Electrical, Computer, and Energy Engineering.

Presentations will be available to attendees shortly and available to the public in 6 months.
Go to 

Key Note Speakers

PwrSoC Workshop – A Perspective of PwrSoC Progress,
Cian O'Mathuna, Tyndall National Institute, Ireland

Advanced Packaging Architectures for Heterogeneous Integration, Ravi Mahajan, Intel Fellow, Intel Corporation



The Workshop speakers made it clear that integrated packaging is currently directly competitive with traditional integrated solutions when considering cost, performance, and product foot-print area。"

Intel in their next generation PC and server development is pursuing both advanced packaging (2。5 D) and Traditional 3D integration tracking Moore's Law。

Some of the Participants

Alex Kalnitsky from TSMC

Jihong Ren from Facebook,
Session Co-Chair

Steve Kummerl from Texas Instruments

PwrPACK 2019 Technical Program

Major SOC suppliers including TSMC provided key updates and progress focusing on a fully integrated PwrSoC solution。 They used this conference as a platform to introduce major announcements related to integrated silicon capacitors and fully integrated inductors availability on power processes today (no longer science fiction)。


The event also provided an opportunity for international collaboration with industry and academia discussing various inductor integration methods and packaging options. Cian O'Mathuna's keynote vision of a billion autonomous sensors clearly showed the opportunity and needs for fully integrated power solutions.

Interest and participation extended beyond traditional PC Board development。 By utilizing both packaging and integration is enhancing the power/processor world and becoming more evident across the industry based on tradeoffs between performance area power, and cost (PPAC)。 Dialog Semiconductor provided an example sharing the work on their 100MHz PSIP PMIC with internal discrete components。

Package integration and device embedding progress is commencing to drive PSiPs to much higher power density levels. Texas Instruments provided examples of that with their MicroSiP™ mm sized devices.

View the full Technical Program at 

2019 IEEE PELS/PSMA Phoenix Workshop on Packaging and Integration in Power Delivery (PwrPack)
Posted: 2019-9-10

An Exploratory Discussion Leading to PwrSoC2020
Oct. 31- Nov. 1, 2019
Skysong Innovation Synergy II, Arizona State University

This Workshop uniquely spotlights technology and manufacturing advancement of
miniaturization and integration of power conversion and power management solutions.


The Power Sources Manufacturers Association (PSMA), in partnership with IEEE Power Electronics Society (), is sponsoring a Workshop on Packaging and Integration in Power Delivery at Arizona State University's SkySong Innovation in Scottsdale, AZ October 31-Nov. 1, 2019. This two half-day event is An Exploratory Workshop Leading to the 2020 International Workshop on Power Supply on Chip (PwrSoC), in Philadelphia, PA.

In recent years, the overall form factor of power electronic devices have scaled-down significantly for a broad range of applications and power levels. This two-half day workshop will focus on two topics related to power delivery in a package:

  1. Power system in package (PSIP) power modules
  2. Process and integration of multi-die power delivery in package.

Invited speakers from both industry and academia will  address the challenges and opportunities in miniaturization and efficiency power delivery  in  application areas. Each session will consist of presentations followed by active discussions between IC designers, assembly experts and substrate/materials providers bringing innovative solutions to address the packaging challenges in power delivery products.
福建快3计划 The workshop will be held at Arizona State University's SkySong Innovation in Scottsdale, AZ. The General Chair is Professor Hongbin Yu from ASU's School of Electrical, Computer and Energy Engineering, who has participated in many of the prior PwrSoC workshops.The Technical Program Chair for the workshop is Jim Doyle from Dialog Semiconductor, who was a keynote presenter at the PwrSoC2018. The support team for the workshop includes Arnold Alderman representing PSMA, Francesco Carobolante representing IEEE PELS, and Prof. Hanh-Phuc Le, Dept. of Electrical, Computer, and Energy Engineering, the University of Colorado at Boulder who is currently IEEE PELS Topic 2 Committee Chair.

Workshop General Chair Professor Hongbin Yu commenting on this workshop's venue: "We are excited to have this workshop in Phoenix area, where there are many microelectronics companies that are very active in developing new semiconductor devices that  require innovation in the scaling of power integration and provide much-improved efficiency。 Through this workshop, we hope to foster much stronger collaboration between academia and industry resulting in new and key contributions in power delivery innovations。"

Technical Program Chair Jim Doyle from Dialog Semiconductor points out "The workshop will bring together technical experts on SOC packaging mainly from the Phoenix area。 The line between pure integration and multichip SIPs have become blurry since processes such as InFo, MCeP,WLP/RCP,WL-esip, 3D TSV offered by different foundries and packaging companies, provide effective solutions competitive with full integration。  These options could revolutionize the decision to integrate or not to integrate。 Join us to learn more about the options and trade-offs。"

Confirmed Invited Speakers
Cian O'Mathuna, Tyndall National University, Ireland PSIP and PwrSoC: Past and Future


Intel Corporation, Chandler, AZ Power Supply in Multi-die Packaging
Karim Arabi, Atlazo Low Power Packaging in IoT Applications
Shinko, Tempe, AZ Embedded Dies and Passive Integration
Ian Kent, Dialog Semiconductor, U.S.A. Power Supply in a Package
John Pigott, NXP Chandler AZ Package & Circuit Interactions and Automotive Applications
Mark Gerber, ASE New Generation Power Packaging Technology

See the completeprogram at the workshop website: 

Registration will be open until October 31st, 2019, and is available through the .

Sign-up for a Partnership Opportunity by sending an email to, or

There are two levels of company partnerships available:

  • Platinum level provides an exhibit table for the duration of the workshop, two free registrations to all events,  plus the Gold-level banner and logo display opportunities.
  • The Gold level provides one free registration to all events,  provides company visibility through banner, logo displays at workshop events, in the technical program, in website and announcement emails.

ASU logo



PELS logo

PSMA logo


  Provided by:  
Hongbin Yu,
General Chair
  Jim Doyle
Technical Program Chair


Packaging and Integration in Power Delivery Workshop
Posted: 2019-6-9

Arizona State University's SkySong Innovation in Scottsdale, AZ
October 31 – November 1, 2019

福建快3计划The Power Sources Manufacturers Association (PSMA), in partnership with IEEE Power Electronics Society (PELS), is sponsoring a Phoenix Workshop on Packaging and Integration in Power Delivery at Arizona State University's SkySong Innovation in Scottsdale, AZ October 31-Nov。 1, 2019。 This two half-day event is An Exploratory Workshop Leading to the , in Philadelphia, PA。

The workshop will focus on the integration of miniature solid state power converters in microelectronics package environment, which attracted increasing interest in recent years as electronic devices overall form factor have scaled down significantly in a broad range of applications and power levels。 In particular, strategies on how to integrate power delivery in package (PSiP) with more efficiency, smaller form factor, will be one of the focuses of the workshop。 The other focus is on how to fit power delivery function into multi-die situation。 These will involve the active discussions between IC designers, assembling experts and substrate/materials providers to provide innovative solutions to address power delivery in package challenges。

福建快3计划The workshop will be held at Arizona State University's SkySong Innovation in Scottsdale, AZ. The General Chair is Professor Hongbin Yu from ASU's School of Electrical, Computer and Energy Engineering, who has participated in many of the prior PwrSoC workshops, and the Technical Program Chair for the workshop is Jim Doyle from Dialog Semiconductor, who presented a keynote speech at the PwrSoC2018. The workshop support team includes Arnold Alderman representing PSMA, Francesco Carobolante representing IEEE PELS, and Prof. Hanh-Phuc Le, Dept. of Electrical, Computer and Energy Engineering, the University of Colorado at Boulder who is currently IEEE PELS Topic 2 Committee Chair. 

For more information about the workshop please contact:

General Chair:
Professor Hongbin Yu.

Technical Program Chair
Jim Doyle.

International Power Supply-on-Chip (PwrSoC) 2018 Workshop: An Outstanding Success!
Posted: 2018-12-11
Attended by leading global scientists and engineers sharing their greatest ever advancements in semiconductor integrated power conversion/management technologies and devices! Sponsored by the Power Sources Manufacturers Association (PSMA) and the IEEE Power Electronics Society (PELS)

The PwrSoC workshops gather outstanding academic and industry experts to discuss the challenges and opportunities in technology, design, and manufacturing necessary for advancement of miniaturized integrated power conversion and management solutions. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint workshop sponsors.

This year the excitement grew as we organized and then held the PwrSoC 2018 workshop in Asia, in one of the world's leading semiconductor manufacturing centers, Hsinchu, Taiwan.

The 2018 PwrSoC Workshop confirmed the strong advancement of the critical technologies necessary to commercialize miniaturized power management semiconductor circuits integrated with associated power passive components。 The Workshop maintained its single track design to make sure attendees did not miss a single learning and sharing moment。

  • Topics drew upon the established package integrated approach (power supply in a package – (PSiP)
  • Leading ultimately to the low cost hybrid and fully on-chip solutions (power supply on chip – (PwrSoC).

The welcoming message to attendees was, "This year, we celebrate the 10-year workshop history with not only advanced technologies to build granular power supplies but also compelling demonstrations of commercialized products that make a clear case for PwrSoC and PSiP technologies becoming more prominent and mainstream." (See the full program at and visit to see more pictures from PwrSoC2018.)

Introductory Remarks The attendees were warmly welcomed to the Workshop by Mau-Chung "Frank" Chang, President of the hosting university, National Chiao Tung University (NCTU) Hsinchu, Taiwan. He related the strong semiconductor technology history of the University. He was followed by Ke-Horng Chen, General Co-Chair from NCTU who suggested that the Antelects of Confucius may be helpful as attendees seek higher knowledge. He wished us a productive and exciting workshop.  Next, Cian O'Mathuna, from Tyndall Institute, Cork Ireland PwrSoC Workshop founder and General Co-Chair reminded us of the 10-year PwrSoC Workshop technical historical landscape.

The Plenary Session was co-chaired by Ke-Horng Chen from National Chiao Tung University, Cian O'Mathuna of Tyndall National Institute, and Seth Sanders with UC Berkeley, U.S.A. The lead-off speaker was Soh Yun Siah from GLOBALFOUNDARIES sharing results of differentiate foundry approach to wafer bonded experimental GaN2BCDMOS explaining that foundries will become differentiated to include assembly functions, followed by James Doyle from Dialog Semiconductor explaining Dialog's 8 A 0.2 mm high converter results of stage 1 (external passives) of planned 2-stage (integrated passives). Peng Zhou from Huawei presented results of on-silicon magnetic thin film inductors development results – a key step towards their granular PwrSoC progress. Finally, Chien-Fan Chen of ASE explained their Semiconductor Embedded SUBstrate (SESUB) technology for robust integrated module devices having 0.3 mm or less thickness.

Session 1 Systems and Applications was co-chaired by Jose Cobos of UPM Madrid and Francisco Carobolante, U.S.A. Speakers analyzed developing approaches that are or will result in better performing power for opportunistic applications highlighted by next generation automotive system microprocessors and solid state regulators (SSRs), hearing aids, and networking systems.

Session 2 Topologies and Control 福建快3计划co-chaired by Arnold Knott of Danish Technical University, Denmark, and Jason Stauth of Dartmouth College, U.S.A., focused on powertrain circuits and controller design for on-chip and other power supplies targeting miniaturization or integration with loads. The speakers include Dr. Christopher Schaef of Intel, Prof. Hanh-Phuc Le of University of Colorado, Dr. Toke Anderson of Nordic Power Converters, and Prof. Alexandre Prodic of University of Toronto. The speakers presented the latest advances in system architecture, converter circuit topologies, including high-frequency, multi-phase or multi-level configurations, resonant power converters operating at high and very high frequencies, switched-capacitor circuits, and hybrid converter topologies that enable ultra-high density miniaturization etc., as well as control systems enabling efficient operation at high frequencies. Particular applications covered in the session include power deliveries and power conversions for high-performance processors, data center, telecommunication systems, and LED drivers.

Session 3 Integrated Capacitive Devices co-chaired by Mohamed Mehdi Jatlaoul of Murata France and Vincent Chou from TSMC, Taiwan with MM Jataoul introducing PM Raj of Georgia Tech explaining that integrated tantalum film power capacitors are an attractive alternative to MLCC or deep trench approaches. He was followed by Jyun-Ying Lin from TSMC, Taiwan who shares their progress with deep trench capacitor (DTC) technology achieving 1.5 µF/mm2 with Vop range of 1.2 to 4 V.  Driven by demands in IoT, Frederic Nodet of Murata (formerly IPDiA) shared their progress with tailoring deep trench capacitors for applications using multiple current injection points to reduce ELS with a roadmap of 6 µF /mm2 by 2023. Finally, Lu Ming of ILika Technologies, China introduced their 250 µAh solid state battery as an alternative narrative.

Session 4 Integrated Magnetics co-chaired by Masahiro Yamaguchi of Tohoku University, Japan, Maeve Duffy of NUI, Ireland, and Charlie Sullivan of Dartmouth College, U.S.A., with Masahiro Yamaguchi introducing the speakers. The session started with Toshio Sato of Shinshu University, Japan addressing the beyond-MHz power conversion magnetics. Resulting application example was a dc-dc converter utilizing laminated Fe-based amorphous composite sheet core embedded in an organic interposer. Noah Sturcken laid out to potential users the compact circuit models for the Ferric Library of devices manufactured by TSMC. Paul McCloskey from Tyndall National Institute, Ireland shared the design, fabrication and characterization of their laminated amorphous CoZrTaB magnetic core material in a gate drive transformer. 3D micro-fabricated air-core inductors were produced by the Technical University of Denmark and applied to a 22 MHz 8.5 Vin, 3 Vout PSiP operating at 83% efficiency. Lastly, Baoxing Chen from Analog Devices presented the optimization of core and winding for the isolated power conversion micro-transformers backed by over 2.7 billion coupler channels of experience.

Session 5 Wide-Band Gap Semiconductors and Integration co-chaired by Bernhardt Wicht from Leibniz University, Germany and Brian Ma from the University of Texas at Dallas, U.S.A. introduced Dan Kinzer of Navitas U.S.A. as the first presenter sharing their progress and success with the combined power and driver high voltage/low voltage GaN in an integrated semiconductor chip. Kenneth Shepard of Columbia University, U.S.A. detailed their face-to-face bonded CMOS/GaN chips as applied to dc-dc converters that can achieve 40 A/mm2. Jef Thoné from MinDCet, a Belgium start up, described their approach to designing in close coordinated focus of the WBG power transistor and its driver. Lastly, Kevin Chen of Hong Kong University provided some insight into their analysis of the WBG device Roff dynamic behavior.

Session 6 Systems Integration, Packaging, and Manufacturing with co-chairs by Hsiao-Ching Tuan fromTSMC, Taiwan and Lou Hutter from Lou Hutter Consulting, U.S.A., with Lou Hutter introducing, Haoyi Ye from Delta Electronics led off by covering Delta's high frequency VRM packaging approach. One of the workshop's highlights was Tim Phillips responding to the 20 to 40 processor voltage rails by introducing to the world Empower Semiconductor's first 10 A hybrid integrated regulators with fully integrated devices on the horizon. Next, S. Koduri from Texas Instruments dove deeply into the numerous packaging issues for high density integrated converters adding that "the package is an active enabler of high power density" and "with the adoption of WBG… some additional complexities arise." Ending the session, Sourabh Khandelval of Macquarie University, Sidney, delved into the Advance SPICE Modeling (ASM) of GaN devices with verified results focused on Roff transitioning loss prediction and minimization.

Session 7 Granular Power Supply was co-chaired by Miguel Rodringuez from AMD, U.S.A., and Santosh Kulkarni of Dialog Semiconductor with Pedro A. M. Bezerra from ETH Switzerland, collaborating with IBM Zurich, presented their work in highly integrated power supplies utilizing 2.5-D 14 nm CMOS. He was followed by Rinkle Jain of Intel sharing their progress in precisely powering graphic processors while coping with all their dynamics. Finally, Yan Lu from the University of Macau spoke regarding their work in switched capacitance (SC) converters, stating that the SC converters are more effective in dynamically sharing power stages for required fine grain processor voltage domains.

Poster Session was held Thursday evening. We were very fortunate to have thirty (30) outstanding posters exhibited. They are listed at 

The Organizing Teams

The Workshop went successfully and smoothly thanks to our very devoted and well connected organizing team led by K.H. Chen, Cian, Hanh-Phuc, and the indispensible Ms. Tai who shepherded her local team making it a rich learning event. The Program Co-Chairs filled each session with revealing and noteworthy information thanks to their selection of valuable presentations.


There were three product exhibit tables。 Wurth Electroniks showcased their expanding number of 28 PSiP "MagI3C Power Modules, LED Modules up to 6 A and 60 V in range。 Ferric exhibited their integrated magnetic cells from TSMC for the first possible merchant granular PwrSoC applications。 Dialog Semiconductor demonstrated their 100 MHz 4-phase 8A buck converter that was highlighted in their plenary presentation。

The Attendees

Workshop attendance reached 158 attendees, 50% above our expectation, with 81 from Asia, 41 from Europe, 35 from North America, and one from Australia。

The program ended with a special treat for the attendees – a tour of TMC's historical Museum and the presentation of Hsinchu Science Park. Many thanksto TSMC, Hsinchu Science Park, and thanks to Landis Inn who provided lovely accommodations for workshop attendees.

Provided by:
Prof. Cian Ó Mathúna. PwrSoC2018 General Co-Chair
and Arnold Alderman, PwrSoC2018 Organizing Committee Member

International Power Supply-on-Chip (PwrSoC) Workshop in Hsinchu, Taiwan, Oct. 17-19, 2018: Registration Now Open
Posted: 2018-8-4
Uniquely spotlights technology and manufacturing advancement of miniaturization and integration of power conversion and power management solutions.

Registration is now open for the 6th international workshop, Power Supply-on-Chip The workshop, being held at the National Chiao Tung University (NCTU) in Hsinchu, Taiwan, October 17-19, 2018. The workshop organizers, speakers, and attendees include global academic and industry experts who are focused on  miniaturizing power management circuits and passive components— initially in package, (power supply in a package – PSiP) but ultimately on-chip, (power supply on chip – PwrSoC). Program participants are a 50/50 balance of industry and academia representatives from all major global regions. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society () are joint sponsors the workshop.

Highlight topics are:

  1. Manufacturing, given that Hsinchu, Taiwan, is one of the world’s chief manufacturing centers
  2. Low-voltage, wide bandgap (WBG) devices for integrated power management

Professor Cian Ó Mathúna of Tyndall National Institute, the originator of the PwrSoC workshops in 2008 and PwrSoC18’s General Co-chair, commented on this year’s venue: "Our endeavour is global. We are excited to invite our Asian colleagues and friends in Hsinchu, a key manufacturing location, to join our workshop participants from around the world to hold this most important dialogue. Manufacturing as well as technology development are cornerstones to realizing our vision of enabling a supply-chain to deliver fully integrated PwrSoC to the commercial marketplace."

Professor Hanh-Phuc Le from University of Colorado, Technical Program Chair, pointed out: "Attendees’ knowledge will be enriched by learning about advancements in converter topologies, passive component technologies, wide-bandgap devices and circuits and new concepts for integration and manufacturing. World-leading experts will discuss far-reaching goals and achievements in a wide range of applications, from powering high-performance processors to automotive and bio-medical systems."

Registration is Open
福建快3计划 In addition to the workshop, a closing tour includes three memorable segments: Hsinchu Science Park, TSMC’s Museum of Innovation, and a presentation, “TSMC Company Profile & Power Technology.” (Early registration is encouraged since tour attendance is limited.) To register, go to:

Partnership Opportunities

福建快3计划Two types of company sponsorships are available: Gold level includes company visibility through banner and logo displays shown in workshop events, the technical program and in website and announcement emails. Platinum level provides your company with an exhibit table for the duration of the workshop, two free registrations to all events – plus the Gold-level banner and logo display opportunities. Sign-up at:


PwrSoC2018 to be held in Hsinchu, Taiwan in Autumn/Fall 2018
Posted: 2017-9-11

In 2018, the will be celebrating its 10th anniversary. The Power Sources Manufacturers Association (PSMA), in partnership with IEEE Power Electronics Society (PELS) is sponsoring the next workshop in Hsinchu, Taiwan October 17-19, 2018.

The workshop will focus on the integration of electrical power converters for multiple applications and address a broad range of technologies. The complete integration on-die (PwrSoC), integration within package (PwrSiP), and the emerging wide-bandgap (WBG) devices for integrated power management are of prime interest. The workshop covers the integration of both modular and granular electronic power converters for multiple applications, by accessing a broad range of leading-edge technologies.

Since the initial events, hosted by Tyndall National Institute in Cork, Ireland in 2008 and 2010, the workshop has, under the joint leadership of IEEE PELS and PSMA, grown from early initial concepts to present emerging commercial product. From 100 attendees in Cork, the Workshops in the USA, in San Francisco and Boston, attracted close to 200 people, in 2012 and 2014. In 2016, the workshop was hosted by UPM in Madrid and again attracted more than 150 people, coming from both industry and academia.

At the Madrid workshop in October 2016, the increasing commercial interest in integrated power was clearly evident. More than 150 participants were in attendance with greater than 50% from companies across the broad microelectronics supply-chain. Attendees were from semiconductor equipment vendors to foundry and fabrication facilities and OSATs (outsourced assembly and test houses) to power converter and passive component suppliers, system-on- chip (SOC) and electronic system companies.

We are fortunate to have the National Chiao Tung University (NCTU) in Hsinchu hosting the 2018 workshop。 The General Co-Chairs are Professor Ke-Horng Chen, Chair of the NCTU Department of Electrical and Computer Engineering, and Professor Cian Ó Mathúna, from Tyndall National Institute, the workshop series originator。 Given the current level of industry interest in the technology commercialization and the monumental challenge that poses, it is appropriate that the 10th anniversary workshop should be held in Taiwan, the global center of microelectronics manufacturing。

Prof。 Chen says, "I am honored to co-chair the 10th PwrSoC workshop in Taiwan。 I believe Taiwan's successful experience in IC design, manufacturing, packaging and systems will surely bring more diversity to this year's workshop。 The workshop will gather academics and industry experts from the United States, Europe and Asia with innovative and progressive technologies that provide a global breakthrough in PwrSoC and PwrSiP technologies。 Professional attendees of this workshop will make it more successful。 Wonderful PwrSoC organization will give participants a feeling of excitement with beautiful landscape and delicious foods in Hsinchu, Taiwan in addition to interesting technical discussions。 Finally, academics and industry in Taiwan look forward to VIP participations from all over the world。"

Technical Program & Call for Organizing Help

The Technical Program Chair for the 2018 workshop is Prof. Hanh-Phuc Le, Dept. of Electrical, Computer and Energy Engineering, University of Colorado at Boulder. Prof. Le is a very familiar participant in past PwrSoC events, chairing several granular power sessions. He is organizing the Technical Program Committee over the coming months and still needs plenty of help. Anyone interested in participating, please contact Prof. Le directly.

Prof. Le explains, "Building upon previous successes, we are expecting a very insightful technical program this year, with a choice team of session chairs from both academia and industry from the U.S., Europe, and Asia. We will bring to our workshop experts with diverse innovations and technical advancements to address the critical needs in PwrSoC, including capabilities of higher input voltages and larger output currents, higher efficiency, while consuming smaller volume/conversion ampere. Particularly, we will focus one session on the challenges and possible solutions for more integrated Wide-bandgap devices that are expected to push the present limits in PwrSoC design. I believe this will be a great workshop, definitely worth attending for everyone concerned with energy efficiency, integrated power electronics design, manufacturing, and cost."

Our workshop will follow the successful formula from previous workshops with a single track of invited presentations and posters。



Plenary Session

Seth Sanders, Professor, UC Berkeley

Systems and Applications

Oliver Chen, Senior Engineer, Mediatek Inc.

福建快3计划Topologies and Control

Arnold Knott, Professor, Danish Technical University, Denmark

Wide-Band Gap Semiconductors and Integration

Eliot Chen, Director, Vanguard Semiconductor, Taiwan

Integrated Magnetics

Masahiro Yamaguchi, Professor, Tohoku University, Japan

Capacitors and Storage Devices

Mehdi Jatlaoui, IPDiA

System Integration, Packaging and Manufacturing

Hsiao-ching Tuan, Director, TSMC

福建快3计划Granular Power Supply

Vivek De, Fellow, Intel

Posters Session

Chung-Chih Hung, Professor, National Chiao Tung University, Taiwan

Visit the PwrSoc website for more information:

General Co-Chairs:
Professor Ke-Horng Chen.
Prof. Cian Ó Mathúna.

Technical Program Chair
Prof. Hanh-Phuc Le. 福建快3计划

PwrSoC 2016, the International Workshop on Power Supply On Chip took place on October 3-5 in Madrid, Spain
Posted: 2016-12-8

PwrSoC 2016 brought together key players involved in the value chain of the integration of both modular and granular electronic power converters for multiple applications, by accessing a broad range of leading-edge technologies. There was an excellent mix of attendees with two-thirds from Industry and one-third from Academia.

Impressive and spirited discussions took place in the Q&A sessions, where current and next generation technologies were addressed in these invited, non-public, presentations.

Complete on-die integration and integration within package were of prime interest. System performance required by current and emerging applications demand ever-greater current density, voltage regulation and optimized control, form factor reduction, high efficiency, and cost reduction.

Awesome Program

福建快3计划“Fast moving technology”, was the general feeling in all the sessions, showing significant advances on the integration of power semiconductors, energy storage, inductive and capacitive components, topologies and control, and manufacturing technologies。


The 156 attendees discussed and networked about next generation Power Supplies on Chip at the ETS Ingenieros Industriales de Madrid (UPM).

The attendees represented a very good balance between the sponsors — 26 percent from PSMA and 24% from IEEE-PELS。 An additional 25 percent were non-members, and 13 percent were IEEE members from societies other than PELS。





A program of 32 excellent E-posters were presented by industry and academia, from Europe, Asia and America, covering a broad range of technologies and innovations. There were lively discussions during the over two hour session.

Welcome Party and Banquet
PwrSoC is unique in bringing together international experts with strong background in fundamentals and basic research, technology development, IC manufacturing and system integration. They all had the opportunity to socialize and network in the impressive welcome party organized by CEI students and sponsored by Qualcomm.

At the social event, a cocktail hour was followed by a banquet, where all attendees enjoyed Spanish cuisine in the midst of the historical Madrid district.

The contribution and leadership of Arnold Alderman and Matt Wilkowski, the General and Program Chairs of PwrSoC 2014 was recognized.


Visit to CEI Lab
The students of the Center of Industrial Electronics (CEI-UPM) discussed with the PwrSoC attendees their recent activities in power electronics, ranging from a few mW to tens of kW, from wireless power to rectifiers and inverters for aerospace applications.

The local team
The Program and Organizing Committees worked hard and set up an excellent program to identify and invite the key individuals in the field. In the photo, the attendees gave public recognition to the students and staff who helped in the local organization of the event.
This latest event consolidates PwrSoC as the most challenging workshop in the integration of low power conversion. PwrSoC was started in Ireland in 2008 and 2010, and soon became a global event. PwrSoC was held in San Francisco in 2012 and in Boston 2014. After Madrid in 2016, it will be held Taiwan in 2018. Current plans are to rotate the workshops worldwide - Europe, America and Asia.

Further info
Information regarding the workshop can be found at , where all past presentations and e-posters are available to the public. PwrSoC 2016 presentations will also be available in April 2017.




Provided by José A. Cobos,
General Chair PwrSoC 2016

Report From PowerSoc2014 - 4th International Workshop On Power Supply On Chip
Posted: 2014-12-26

Workshop on little power supplies a BIG success!

The 4th International Power Supply on Chip (PwrSoC) Workshop convened October 6, 7, and 8 in Boston MA. The PwrSoC Events are sponsored by PSMA Power Electronics Packaging Committee and IEEE/PELS and have been held every two years since the first workshop in Cork, Ireland in 2008. We are pleased to report that the 2014 Workshop was a splendid success with a record 190 attendees. A majority 72% of attendees were from US/Canada, 20% from Europe and 7% from Asia. It was great to see many commercial companies contributing to our Workshop with a 65/35 balance between industry and academia participants.

Hosted by NUCOE

Arnold Alderman of Anagenesis, this year’s General Chair, opened the Workshop with a welcome to the attendees and stated that, “We are fortunate to have Northeastern University College of Engineering (NUCOE) host our Workshop. Our activities will be held on multiple levels of the Curry Student Center in the heart of the university campus.” Professors Nian Sun and Brad Lehman both of NUCOE provided additional opening remarks to welcome the participants to hospitality and diverse activities of Boston and to take advantage of the enthusiasm of the university environment. The workshop opening was highlighted by a welcome from NUCOE Dean Nadine Aubry, wishing us a very creative and exciting three days at Northeastern University. We expressed our delight to have the additional support from Platinum Partner Altera Corporation, and Silver Partner Mag Layers, Inc.

Outstanding Technical Program

The Workshop success can be attributed to our outstanding Technical Program of 33 invited presentations () and 32 posters (). This year we included a plenary session appropriately chaired by Cian O’Mathuna. We heard visionary talks by Bruno Allard from Ampere-Lab, Lyon, France; Seth Sanders from UC Berkeley, and Francesco Carobolante from Qualcomm. The technical sessions, led by Matt Wilkowski, Program Chair, started with identifying strategies that address system, topology and circuit approaches to meet the requirements of both present and emerging applications. It included responding to the demand ever-greater current density, optimized control, form factor reduction, higher efficiency, while reducing cost.

PwrSoC Capacitor Q&A

Accordingly, the remainder of the workshop focused on the integration of both modular and granular commercially successful miniature power converters that include magnetic and capacitor power passive elements designed for multiple applications. Presentations on power semiconductors, device packaging, and manufacturing filled out the rest of the sessions with an eye towards on-die integration and integration within package.

The presentations and e-posters will be downloadable from a password protected section of the Power Supply on Chip Workshop website beginning in late November。 After June 2015, the presentations and e-posters will be downloadable from a publically accessible section of the website。

We believe the workshop’s success was also largely derived by the incredible increasing global interest in power supply on chip development and commercialization。 That interest level was validated by the boundless interactive dialogue during the Q&A portion of the technical sessions that spilled over into the breaks and the reception on Monday night。

New – E-posters

We always complement our technical sessions with a poster session that provides an opportunity for many more participants to share their ideas and work that encompasses all of the PwrSoC technical disciplines. This year we upgraded our poster session with interactive flat-panel displays. The posters session of the technical sessions allowing in-depth one-on-one dialogue between the attendees and the presenters using the synergy of e-posters as a vehicle to initiate discussion for thirty plus relevant topics over a three-hour period.


Our Tour

Additionally, Professors Nian Sun and Brad Lehman organized tours of electrical engineering laboratories acquainting attendees with the many relevant and significant research programs ongoing at Northeastern University capably and enthusiastically presented by NUCOE’s next generation power electronics engineers and scientists。


Awards and Recognitions


The PwrSoC Workshop has had strong leadership from its beginning。 The PwrSoC Events Steering Committee, fully recognizing this, surprised Dr。 Cian O'Mathuna with the PwrSoC Events Founder's award for all of his effort to create the PwrSoC Workshop and nurture it into a mainstream event。 The Steering Committee also presented an award of appreciation to Dr。 Seth Sanders for his strong leadership as General Chair of PwrSoC 2012 Workshop。 The success of PwrSoC 2014 is owed to the tireless efforts of the members of our Organizing and our Technical Program Committees。 These committees were represented by Altera, Ampere–Lab, Anagenesis, Analog Devices, AT&S, Dartmouth University, GLOBAL FOUNDRIES, Infineon, Lion Semiconductor, LTEC, Maxim, MIT, Northeastern University, Qualcomm, Tyndall National Institute, UC Berkeley , University Polytechnic Madrid, University Polytechnic Catalunya, , University of Toronto, and the US Army Research Laboratory。

Making Our Next Workshop Even Better

At the end of the workshop technical sessions, the organizing committees completed an assessment of the current workshop based on feedback and comments from the attendees。 The assessment would form a basis for improvements for future workshops。 Past assessments led to: our having more networking time at various points throughout the workshop; a Monday evening reception; interactive dialogue during the Q&A portion of the technical sessions; continuing a bi-annual agenda; holding the workshop multiple global regions; and staying with the workshop format rather than moving on to a conference format。

To Madrid Next

Then, we started planning for our next workshop. The PwrSoC Events are alternately led by IEEE/PELS and PSMA. Accordingly, the next workshop will be held in the fall of 2016, in Madrid Spain led by IEEE/PELS, with José Cobos from the Technical University of Madrid (UPM) as general chair. PSMA will be leading the PwrSoC Workshop in 2018. Location yet to be determined.

PELS Papers Opportunity

In the interim between the current workshop and the 2016 workshop, IEEE/PELS is organizing an editorial team to create an issue of the Journal of Emerging and Selected Topics in Power Electronics (JESTPE) dedicated to Power Supply on Chip focusing key papers written on the technologies enabling PwrSoC development. Although this journal is not directly associated with the PwrSoC workshop series, it complements the PwrSoC workshop series, allowing presenters and attendees the opportunity to formally publish their ideas and realizations.

We strongly believe that interest and participation in the PwrSoC workshop series will continue to grow as PwrSoC technologies are commercialized based on the ideas, interactions and networking that are cultivated by these workshops. Our thanks to both PSMA and PELS for their support in making these workshops possible and to all of the members of the steering, organizing and technical committees which is best expressed as the following quote from Cian O’Mathuna: “it was great to participate in the workshop again this year. It was an excellent event. Congratulations to everyone who made it happen. ”

Provided by Matt Wilkowski, Altera Corporation, Program Chair 
and Arnold Alderman, Anagenesis Inc., General Chair

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